Three Modern Trends in the Design Architecture of CPU Term Paper
- Length: 6 pages
- Subject: Education - Computers
- Type: Term Paper
- Paper: #76395424
Excerpt from Term Paper :
CPU design has primarily been a function of two separate factors. Like trying to decide how to get across town, on a bus, taxi or personal auto, the process of getting from point a to Point B. In computer terminology has been dependant to two extrinsic factors. First, CPU architecture has been influenced by the technology available at the time of manufacture. Although the growth curve regarding semiconductor closely resembles a straight line - one that goes straight up - at the time of any chips manufacture, the technology which could be employed during the manufacturing process was the single most delimiting factor.
The second influence on the CPU's design architecture is based on the type of applications which the computer would be expected to process. CPU's which would be called upon to perform repetitive, analysis type processing when any given report is requested are bounded by different parameters than processors called upon to perform real-time calculations while at the same time supporting complex operating systems used by potentially unlimited users. This second example resembled modern web-based network servers. These two factors, manufacturing limitations and application types have affected the design and manufactures of chips throughout the modern computer revolution. These factors are expected to continue to guide CPU development into the foreseeable future.
Along the CPU growth path, three major categories of CPU's have powered digital devices. These three are:
SMP: Symmetrical Multiprocessing CPU's which are designed as fixed processors for large, mainframe type systems.
A x86 chips (286, 386, 486, etc.) which have formed the core of the modern generation of laptop and desktop workstation computers.
32 bit embedded processors, which are different from x86 architecture in that these chips do not typically operate with a cache, and work out of RAM and ROM memory.
These CPU product trends are currently still operating in the field, and are each uniquely suited for their respective tasks.
According to Nass, (1996) when designers look at the available CPU architectures, there's a checklist that help simplify the task. The performance level that's required from the CPU is the first limitation. The second set of guidelines revolves around the availability of software tools, operating systems, compilers, and debuggers. Finally, the application for which the CPU is intended to operate is the third relevant factor. Most of the architectures can be forced to comply with each of the points regardless of the answers to the questions, but, the important question is, which CPU is best suited for each of the points. No one would want to carry around a desktop computer just to have the ability to use a cell phone or PDA.
In the words of Ray Alderman, executive director of the VME International Trade Association (VITA), Phoenix, Ariz., "When you start to push the application, that's when specific architectures or CPU environments start to exert themselves and stand out." (Nass, 1996)
The software issue is probably the most important aspect which is often overlooked. Users must understand which software, including operating systems in order to create a CPU which can handle the expected load faithfully. All the elements which are required by the computer usage must all work cohesively in concert.
SMP - Fixed processors.
Back in the time when computers were designed as mainframe systems, and took up entire floors of office buildings, the CPU architecture was simply designed, while still offering a measure of scalability. Identical CPU's were placed in a symmetrical configuration, with each CPU having access to processing data from the same supply line, and feeding results to the same output. Under SMP, tightly coupled CPUs shared a common memory and a single image of the operating system. All CPUs are treated as equals and any available CPU could execute any available function. According to LArdear (1995) the idea was similar to adding a second 396 cubic inch engine to a Chevrolet muscle car. There is still only one chassis, transmission, and steering wheel, but you are now theoretically running at twice the horsepower. "SMP is neither elegant nor efficient," says Terry Keene, VP of Enabling Technology Group Inc., an Atlanta-based open systems consulting firm. But SMP's reputation as a scalable, upgradeable, flexible and compatible architecture fires customers' imaginations. (Lardear, 1995) Customers selecting a SMP design structure were able to have freedom of choice without having to reinvent the entire system every time they wanted to upscale.
The Cold, hard realities about SMP structure, however, can squelch that initial level of enthusiasm. With the advances in CPU design, a single fast CPU has been able to perform better than an SMP configuration. For example, in the Transaction Processing Performance Council's TPC-C benchmark, a uniprocessing POWER2-based IBM RS/6000 Model 59H runs at 1122.30 tpm-C, while Sun Microsystems' eight-way SPARCserver 1000 runs at only 1204.10 tpm-C
Secondly, SMP does not scale directly linearly. Because the more CPUs that are added to a parallel system, the more competition is created for shared resources such as memory, bus bandwidth, and I/O. The efficiency of a SMP system eventually hits a point of diminishing returns as the cpu's fight for system bandwidth. The more demand that is put on a shared resource, the less efficient it becomes until it hits the point of diminishing, return
In the development curve of CPU architecture, this design limitation of SMP architecture lead engineers to work toward another design which could take the load off the cpu by creating multiple bus inputs, and multiple co-processors as caches. Bu expanding the pipeline of inputs and outputs, engineers were able to create a new line of CPU's which revolutionizes the marketplace.
A x86 Processors
The x86 processors began their design curve with the limitations of the SMP devices, and designed ways to add processing 'elbowroom' for the CPU. By adding caches, inboard, or on the processor motherboards, the CPU was able to accept more information in, and work on multiple tasks at one time. This was the limit of the SMP processors, which could accept limited information at one time.
Designers have been developing x86 chips though internal performance enhancements of the chip. The initial 286 chips were based on a 16 bit processing abilities. The 486 chips saw the introduction of onboard caches in order to up their processing speeds, and accept 32 bit architecture. Today, Pentium chips, and the new Itanium chips from Intel are functioning on 64 bit architecture with the help of multiple caches, large amounts of active memory, and greater parallelism within the chip to handle the increased processing loads. (Burskey, 1996) Returning to our muscle car engine metaphor, rather than put additional engines in a vehicle to increase the horsepower output, x86 architecture achieved greater processing power by adding turbochargers, Electronic fuel injections, high torque differentials, and domed pistons. These high performance pre-processor upgrades and post processing upgrades allowed the processor itself to run at higher speeds, and compute more applications in the same amount of time.
Another design innovation which was created to support the x86 architecture was the imbedded processor. These auxiliary processors were designed to handle specific loads spilling over from the main CPU. Embedded processors enabled the CPU to run cooler and faster. As the embedded processors evolved, they have become a CPU type of their own, and are found in devices other than computers. Cell phones, PDA's and other electronic household devices have embedded CPU's as the control devices.
Some embedded platforms arose from architectures designed primarily for the desktop market (for example, MIPS, Sparc, and the x86). They were designed as helpers for complex systems, and earned the right to become stand alone processors in simple devices. The difference between x86 architecture and embedded is not the register organization, basic instruction set, or the pipelining concept. Instead, such issues as power consumption, cost, and number of integrated peripherals differentiate a desktop CPU from an embedded processor. Other important features include the interrupt response time, the amount of on chip RAM or ROM, and the number of parallel ports. Whereas the desktop world values processing power and can change the shape and size of the device to accommodate the processor design changes, an embedded microprocessor must do the job for a particular application at the lowest possible cost within specific size and heat limitations. Economically meeting the needs of new applications and new devices are the driving forces behind new classes of embedded processors. These devices are slowly narrowing the gap between the desktop and the embedded world. Applications like handheld, palmtop PDA's, video game consoles, and car information systems require a display, a powerful processor, storage media, and interfaces to communicate with the outside world. For these reasons, embedded processors have in some ways begun to incorporate capabilities traditionally associated with conventional CPUs-but with a twist: They are subject to challenging cost, power consumption, and application-imposed constraints.
These three CPU architectural styles have been determined by the design constraints of the day, as well as the demands which the computing world is applying…